IBM And Siemens Join Forces

IBM and Siemens have announced a joint research effort to push forward IBM’s nanostack transistor architecture, unveiled earlier this year, by linking IBM’s device innovation with Siemens’ strengths in electronic design automation (EDA), process simulation, lithography optimisation and advanced manufacturing software.

Nanostack is billed as the first known three-dimensional, nanosheet-based approach that vertically stacks and staggers transistors to increase density, targeting nearly 100 billion transistors within the area of a fingernail at the current 7 angstrom node. The structure enables different material combinations to be used in each stacked layer, allowing performance and power efficiency to be tuned for each transistor independently. The approach promises significant gains in energy efficiency, compute performance and SRAM scaling.

IBM has already demonstrated nanostack’s technical feasibility this year. The new collaboration focuses on bridging the gap to high-volume manufacturing by advancing the design, simulation and lithography techniques required to mature the technology and prepare it for production.